Example embodiments relate generally to semiconductor integrated circuits, and more particularly to memory devices and circuits, and methods of reading data in memory devices.
Semiconductor memory devices include a plurality of memory cells that are arranged in a matrix form of a plurality of rows and a plurality of columns. In a non-volatile memory device, the memory cells are coupled between a plurality of source lines and a plurality of bit lines. Each bit line is coupled to the memory cells that are selected by the respective word lines. In a read operation, one memory cell is selected among the memory cells commonly coupled to the same bit line, and a sensing current flows from the bit line to the source line via the selected memory cell where the sensing current depends on the state, that is, the stored data of the selected memory cell. The stored data may be read out based on the sensing current or a voltage change due to the sensing current. In such read operation, the bit line voltage may be affected by leakage currents by the unselected memory cells coupled to the same bit line, and thus reliability of the read operation or the read data may be degraded.